A Scheme Interpreter for ARM Microcontrollers:
ChangeLog for Version 070

Changes from release 060:

This release supports 10 new boards (8 in-house, 2 contributions): Atmel SAMG53 Xplained, Freescale FRDM-K64F, NGX LPC4357-Xplorer++ (with LCD baseboard), ST Nucleo-F401RE, ST STM32F429 Discovery (with LCD), TI EK-TM4C1294XL, TI BeagleBone Black, Gumstix Duovero Crystal (on Parlor board), MBED LPC1768 (contributed by Kuba Tyszo), and STM32-ARMka (contributed by Ruslan Popov).

Two code versions are in the distribution for the LPC4357-Xplorer++. One version is to be uploaded by dfu and is a small version that has no macros, no r5rs library, no USB and is for integers only. Strategies for adding the missing components to a running system may be presented in an additional web page (eg. MCU-specific examples). The reason for this small version is that the MCU has only 32KB of RAM in which to load the DFU code (the LPC4330, by contrast, has much more). The second version is a normal version of Armpit Scheme (with USB, floats, etc...) and it is to be loaded in using lpc21isp, to the MCU FLASH. The drawback of this version is that the board doesn't have an ISP switch, and, once the code is loaded into FLASH, the other boot options (eg. dfu), and even ISP, are no longer functional. There are 2 workarounds for this situation. First, if Armpit Scheme is running on the board, you can erase the 1st flash sector using (erase #x1A00000) -- this will invalidate the FLASH code (and, obviously, kill ArmPit Scheme) such that boot options and ISP are restored after reset. The second option is to manually contact the ISP pin to ground on reset, with a wire. The pin I've used for this is on the SDRAM memory chip (A19 pin I think), next to the circular JP6 pad on the board. It should also be possible to use JTAG/OpenOCD for this but I have not tried it on this board.

The Duovero Crystal code in the distribution is quite complete except for float/rationals/complex numbers support. This MCU has a 48 KB boot RAM that is slightly too small to include everything. Both cores (cpu0 and cpu1) are operational (but do not yet communicate with one another), with cpu1 tied to the uart/FTDI and cpu0 tied to the USB port next to the Ethernet plug on the Parlor board. A strategy for adding the missing numbers support to a running system may be presented in an additional web page (eg. MCU-specific examples).

On the STM32F4 Discovery and STM32F429 Discovery, the SD-card subsystem is now enabled by default. Consult the respective board.h files to identify the pins to which the SD-card should be connected.

On the LPC4330-Xplorer, the M0 co-processor is now used to provide usb-device support on the second USB port of the board (next to the ethernet connector). The uart is not functional unless this second USB port is disabled by commenting out the enable_cpo and cpo_default_io options in the board.h file.

The directory structure has been modified slightly. Common code is in the aps_common folder and ready-to-upload binaries are in the aps_bin folder. MCU-specific code is under manufaturer folders (Atmel, Cirrus, ..., TI). The build_all_aps shell script builds all binaries. Utility programs that convert some of the binaries to DFU or MLO format are included in the source (and called automatically by build_all_aps) and need to be built using the compile_aps_utils shell script prior to running build_all_aps.

Five 060 bugs have been fixed: 1) for the LPC 1300, the needed .ltorg has been added at end of include file for usb; 2) for the (list? ) function, the exit to #f problem has been corrected; 3) for the (write bytevec base-address negative-offset) function, the use of cdrne in pmmwrt: has been fixed; 4) for the equal? function, ldr rva, [sv1, #-4] has been updated to ldr rvb, [sv1, #-4]; 5) the memory-full error in unpaca and strsya branched to stsyer but used pstsym rather than sstsym, and this has been fixed.

The source code has been updated such that the separation of code and data is achieved by using macros along with .text and .data directives. The result is fewer files and easier code updates than in 060 while the potential advantages of code/data separation in Harvard architectures are maintained.

The external representations of built-in symbols and functions are now stored in one-string per sub-enviroment (rather than one string per symbol). Individual symbols are separated by an ASCII character that represents the size of the next symbol, plus 48, such that, when (_GLV) is invoked to display the Global Environment, the characters 1-9 appear between small symbols (of length 1 to 9 characters) while other less common characters occur before larger function names or symbols. This strategy freed up sufficient space that it became possible to add a random number generator and common aliases (eg. logior and |, for bitwise-ior) to the code.

Code to use the MMU as an MPU (for gc) on ARM9 and Cortex-A8/A9 has been added. In some cases, this code (enabling the MPU function) has adverse effects on those MCUs (likely due to cache update/cleanup issues) and so this option should be considered experimental at this stage. The potential issues were observed to arise when code is copied above the heap (by the aps compiler or ARMSchembler) and when above-heap space is used as a frame-buffer (eg. for DVI-D/HDMI output to a TV). The enable_MPU option should be disabled (commented out) in the board.h files for these MCUs if issues arise (it is disabled by default in some of them).

The SD card subsystem has been updated to work more reliably with different card versions. An option has also been added to use SDHC cards (eg. sdhc_on_sd_mmc in board.h). Note however that if this option is enabled, only SDHC cards can be used, and these cards need to start with a FAT16 partition (less than 2GB) which is what ArmPit Scheme will read-from/write-to.

The user-space garbage collection function, (gc), has been modified to return the number of free cons-cells (8-bytes each) rather than the number of free bytes of heap memory. This was done for two reasons: 1) at least one supported board has more than 512MB of RAM (which is the limit for 30-bit integer values used internally as tagged Scheme-Integers) and it would feel strange for (gc) to return negative numbers when more than 512MB of heap remains available, and, 2) all memory allocations are 8-byte aligned in this release (and in 060 and 050).

The code uses new assembler macros (especially for MCU configuration), like rgcpbt or rgrmw that set/clear (cp, rmw) bits (bt) into registers (rg). These make the code more compact but be advised that they can modify the contents of rva, rvb and/or rvc. Use them with caution.

The ARMSchemblers (ARM and T2) have been updated for this version. This makes it possible to update the compiler and LCD writing and drawing examples. Updated examples are presented under the Documentation heading (eg. Common Program Examples, ...) on the main web page (updated as new examples are produced)

bioe-hubert-at-sourceforge.net